f2f2afe13b
* Add support for STM32L0/L1 onboard EEPROM. * Update docs/eeprom_driver.md Co-Authored-By: Joel Challis <git@zvecr.com> Co-authored-by: Joel Challis <git@zvecr.com>
96 lines
2.9 KiB
C
96 lines
2.9 KiB
C
/* Copyright 2020 Nick Brassel (tzarc)
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdint.h>
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#include <string.h>
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#include "hal.h"
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#include "eeprom_driver.h"
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#include "eeprom_stm32_L0_L1.h"
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#define EEPROM_BASE_ADDR 0x08080000
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#define EEPROM_ADDR(offset) (EEPROM_BASE_ADDR + (offset))
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#define EEPROM_PTR(offset) ((__IO uint8_t *)EEPROM_ADDR(offset))
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#define EEPROM_BYTE(location, offset) (*(EEPROM_PTR(((uint32_t)location) + ((uint32_t)offset))))
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#define BUFFER_BYTE(buffer, offset) (*(((uint8_t *)buffer) + offset))
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#define FLASH_PEKEY1 0x89ABCDEF
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#define FLASH_PEKEY2 0x02030405
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static inline void STM32_L0_L1_EEPROM_WaitNotBusy(void) {
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while (FLASH->SR & FLASH_SR_BSY) {
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__WFI();
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}
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}
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static inline void STM32_L0_L1_EEPROM_Unlock(void) {
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STM32_L0_L1_EEPROM_WaitNotBusy();
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if (FLASH->PECR & FLASH_PECR_PELOCK) {
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FLASH->PEKEYR = FLASH_PEKEY1;
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FLASH->PEKEYR = FLASH_PEKEY2;
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}
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}
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static inline void STM32_L0_L1_EEPROM_Lock(void) {
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STM32_L0_L1_EEPROM_WaitNotBusy();
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FLASH->PECR |= FLASH_PECR_PELOCK;
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}
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void eeprom_driver_init(void) {}
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void eeprom_driver_erase(void) {
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STM32_L0_L1_EEPROM_Unlock();
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for (size_t offset = 0; offset < STM32_ONBOARD_EEPROM_SIZE; offset += sizeof(uint32_t)) {
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FLASH->PECR |= FLASH_PECR_ERASE | FLASH_PECR_DATA;
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*(__IO uint32_t *)EEPROM_ADDR(offset) = (uint32_t)0;
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STM32_L0_L1_EEPROM_WaitNotBusy();
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FLASH->PECR &= ~(FLASH_PECR_ERASE | FLASH_PECR_DATA);
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}
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STM32_L0_L1_EEPROM_Lock();
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}
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void eeprom_read_block(void *buf, const void *addr, size_t len) {
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for (size_t offset = 0; offset < len; ++offset) {
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// Drop out if we've hit the limit of the EEPROM
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if ((((uint32_t)addr) + offset) >= STM32_ONBOARD_EEPROM_SIZE) {
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break;
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}
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STM32_L0_L1_EEPROM_WaitNotBusy();
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BUFFER_BYTE(buf, offset) = EEPROM_BYTE(addr, offset);
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}
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}
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void eeprom_write_block(const void *buf, void *addr, size_t len) {
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STM32_L0_L1_EEPROM_Unlock();
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for (size_t offset = 0; offset < len; ++offset) {
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// Drop out if we've hit the limit of the EEPROM
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if ((((uint32_t)addr) + offset) >= STM32_ONBOARD_EEPROM_SIZE) {
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break;
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}
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STM32_L0_L1_EEPROM_WaitNotBusy();
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EEPROM_BYTE(addr, offset) = BUFFER_BYTE(buf, offset);
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}
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STM32_L0_L1_EEPROM_Lock();
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}
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