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Fix a few dumbs in udivmod32

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This commit is contained in:
Sijmen 2020-12-07 14:08:03 +01:00
parent 83b7698180
commit 4793f79e79
Signed by: vijfhoek
GPG key ID: DAF7821E067D9C48
1 changed files with 22 additions and 22 deletions
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44
c64/math.asm
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@ -296,18 +296,18 @@ generate_multiplication_tables:
udivmod32:
// if (divisor == 0) {
lda udivmod32_divisor + 0
bne !+
bne !if_end+
lda udivmod32_divisor + 1
bne !+
bne !if_end+
lda udivmod32_divisor + 2
bne !+
bne !if_end+
lda udivmod32_divisor + 3
bne !+
bne !if_end+
// return 0;
rts
!:
// }
!if_end:
// uint32_t scaled_divisor = divisor;
lda udivmod32_divisor + 0
@ -339,23 +339,23 @@ udivmod32:
sta multiple + 3
// uint32_t result = 0;
sta result + 0
sta result + 1
sta result + 2
sta result + 3
sta udivmod32_result + 0
sta udivmod32_result + 1
sta udivmod32_result + 2
sta udivmod32_result + 3
// while (scaled_divisor < dividend) {
!while_start:
sec
lda scaled_divisor + 0
sbc dividend + 0
sbc udivmod32_dividend + 0
lda scaled_divisor + 1
sbc dividend + 1
sbc udivmod32_dividend + 1
lda scaled_divisor + 2
sbc dividend + 2
sbc udivmod32_dividend + 2
lda scaled_divisor + 3
sbc dividend + 3
sbc udivmod32_dividend + 3
bcs !while_end+
// scaled_divisor <<= 1
@ -404,7 +404,7 @@ udivmod32:
sta udivmod32_remainder + 3
// }
!if_end
!if_end:
// scaled_divisor >>= 1;
lsr scaled_divisor + 3
@ -418,15 +418,15 @@ udivmod32:
ror multiple + 1
ror multiple + 0
lda multiple + 0
bne !do_start
lda multiple + 1
bne !do_start
lda multiple + 2
bne !do_start
lda multiple + 3
bne !do_start
// } while (multiple != 0);
lda multiple + 0
bne !do_start-
lda multiple + 1
bne !do_start-
lda multiple + 2
bne !do_start-
lda multiple + 3
bne !do_start-
rts