2018-05-20 04:53:34 +00:00
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#include "interrupt.h"
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#include "rpiHardware.h"
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#define ARM_IC_IRQ_PENDING(irq) ( (irq) < ARM_IRQ2_BASE \
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? ARM_IC_IRQ_PENDING_1 \
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: ((irq) < ARM_IRQBASIC_BASE \
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? ARM_IC_IRQ_PENDING_2 \
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: ARM_IC_IRQ_BASIC_PENDING))
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#define ARM_IC_IRQS_ENABLE(irq) ( (irq) < ARM_IRQ2_BASE \
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? ARM_IC_ENABLE_IRQS_1 \
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: ((irq) < ARM_IRQBASIC_BASE \
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? ARM_IC_ENABLE_IRQS_2 \
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: ARM_IC_ENABLE_BASIC_IRQS))
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#define ARM_IC_IRQS_DISABLE(irq) ( (irq) < ARM_IRQ2_BASE \
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? ARM_IC_DISABLE_IRQS_1 \
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: ((irq) < ARM_IRQBASIC_BASE \
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? ARM_IC_DISABLE_IRQS_2 \
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: ARM_IC_DISABLE_BASIC_IRQS))
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#define ARM_IRQ_MASK(irq) (1 << ((irq) & (ARM_IRQS_PER_REG-1)))
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static IRQHandler* IRQHandlers[IRQ_LINES] = { 0 };
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static void* Params[IRQ_LINES] = { 0 };
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void InterruptSystemInitialize()
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{
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InstructionSyncBarrier();
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DataMemBarrier();
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write32(ARM_IC_FIQ_CONTROL, 0);
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write32(ARM_IC_DISABLE_IRQS_1, (u32)-1);
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write32(ARM_IC_DISABLE_IRQS_2, (u32)-1);
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write32(ARM_IC_DISABLE_BASIC_IRQS, (u32)-1);
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// Ack pending IRQs
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write32(ARM_IC_IRQ_BASIC_PENDING, read32(ARM_IC_IRQ_BASIC_PENDING));
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write32(ARM_IC_IRQ_PENDING_1, read32(ARM_IC_IRQ_PENDING_1));
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write32(ARM_IC_IRQ_PENDING_2, read32(ARM_IC_IRQ_PENDING_2));
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DataMemBarrier();
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2019-09-10 21:14:34 +00:00
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#ifdef EXPERIMENTALZERO
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DisableInterrupts();
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#else
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2018-05-20 04:53:34 +00:00
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EnableInterrupts();
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2019-08-31 11:26:23 +00:00
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#endif
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2018-05-20 04:53:34 +00:00
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}
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void InterruptSystemConnectIRQ(unsigned IRQIndex, IRQHandler* handler, void* param)
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{
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2019-08-31 11:26:23 +00:00
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#ifndef EXPERIMENTALZERO
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2018-05-20 04:53:34 +00:00
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IRQHandlers[IRQIndex] = handler;
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Params[IRQIndex] = param;
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InterruptSystemEnableIRQ(IRQIndex);
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2019-08-31 11:26:23 +00:00
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#endif
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2018-05-20 04:53:34 +00:00
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}
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void InterruptSystemDisconnectIRQ(unsigned IRQIndex)
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{
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InterruptSystemDisableIRQ(IRQIndex);
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IRQHandlers[IRQIndex] = 0;
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Params[IRQIndex] = 0;
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}
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void InterruptSystemEnableIRQ(unsigned IRQIndex)
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{
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2019-08-31 11:26:23 +00:00
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#ifndef EXPERIMENTALZERO
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DEBUG_LOG("InterruptSystemEnableIRQ %d\r\n", IRQIndex);
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2018-05-20 04:53:34 +00:00
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DataMemBarrier();
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write32(ARM_IC_IRQS_ENABLE(IRQIndex), ARM_IRQ_MASK(IRQIndex));
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DataMemBarrier();
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2019-08-31 11:26:23 +00:00
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#endif
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2018-05-20 04:53:34 +00:00
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}
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void InterruptSystemDisableIRQ(unsigned IRQIndex)
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{
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DataMemBarrier();
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write32 (ARM_IC_IRQS_DISABLE(IRQIndex), ARM_IRQ_MASK(IRQIndex));
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DataMemBarrier();
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}
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void InterruptHandler(void)
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{
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// DEBUG_LOG("InterruptHandler\r\n");
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DataMemBarrier();
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//(irq) < ARM_IRQ2_BASE ? ARM_IC_IRQ_PENDING_1 : ((irq) < ARM_IRQBASIC_BASE ? ARM_IC_IRQ_PENDING_2 : ARM_IC_IRQ_BASIC_PENDING
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//for (unsigned IRQIndex = 0; IRQIndex < IRQ_LINES; ++IRQIndex)
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//{
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// u32 nPendReg = ARM_IC_IRQ_PENDING(IRQIndex);
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// u32 IRQIndexMask = ARM_IRQ_MASK(IRQIndex);
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//
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// if (read32(nPendReg) & IRQIndexMask)
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// {
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// IRQHandler* pHandler = IRQHandlers[IRQIndex];
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// if (pHandler != 0)
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// (*pHandler)(Params[IRQIndex]);
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// else
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// InterruptSystemDisableIRQ(IRQIndex);
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// }
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//}
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unsigned IRQIndex;
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u32 nPendReg;
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u32 pendValue;
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nPendReg = ARM_IC_IRQ_PENDING_1;
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pendValue = read32(nPendReg);
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for (IRQIndex = 0; IRQIndex < ARM_IRQ2_BASE; ++IRQIndex)
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{
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u32 IRQIndexMask = ARM_IRQ_MASK(IRQIndex);
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if (pendValue & IRQIndexMask)
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{
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2019-08-31 11:26:23 +00:00
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#ifndef EXPERIMENTALZERO
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2018-05-20 04:53:34 +00:00
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IRQHandler* pHandler = IRQHandlers[IRQIndex];
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if (pHandler != 0)
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(*pHandler)(Params[IRQIndex]);
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else
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2019-08-31 11:26:23 +00:00
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#endif
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2018-05-20 04:53:34 +00:00
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InterruptSystemDisableIRQ(IRQIndex);
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}
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}
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nPendReg = ARM_IC_IRQ_PENDING_2;
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pendValue = read32(nPendReg);
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for (;IRQIndex < ARM_IRQBASIC_BASE; ++IRQIndex)
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{
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u32 IRQIndexMask = ARM_IRQ_MASK(IRQIndex);
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if (pendValue & IRQIndexMask)
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{
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2019-08-31 11:26:23 +00:00
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#ifndef EXPERIMENTALZERO
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2018-05-20 04:53:34 +00:00
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IRQHandler* pHandler = IRQHandlers[IRQIndex];
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if (pHandler != 0)
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(*pHandler)(Params[IRQIndex]);
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else
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2019-08-31 11:26:23 +00:00
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#endif
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2018-05-20 04:53:34 +00:00
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InterruptSystemDisableIRQ(IRQIndex);
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}
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}
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nPendReg = ARM_IC_IRQ_BASIC_PENDING;
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pendValue = read32(nPendReg);
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for (;IRQIndex < IRQ_LINES; ++IRQIndex)
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{
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u32 IRQIndexMask = ARM_IRQ_MASK(IRQIndex);
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if (pendValue & IRQIndexMask)
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{
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2019-08-31 11:26:23 +00:00
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#ifndef EXPERIMENTALZERO
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2018-05-20 04:53:34 +00:00
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IRQHandler* pHandler = IRQHandlers[IRQIndex];
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if (pHandler != 0)
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(*pHandler)(Params[IRQIndex]);
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else
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2019-08-31 11:26:23 +00:00
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#endif
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2018-05-20 04:53:34 +00:00
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InterruptSystemDisableIRQ(IRQIndex);
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}
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}
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DataMemBarrier();
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}
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