216 lines
6.4 KiB
C
216 lines
6.4 KiB
C
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/*
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Part of the Raspberry-Pi Bare Metal Tutorials
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Copyright (c) 2013-2015, Brian Sidebotham
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef RPI_GPIO_H
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#define RPI_GPIO_H
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#include "rpi-base.h"
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/** The base address of the GPIO peripheral (ARM Physical Address) */
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#define RPI_GPIO_BASE (PERIPHERAL_BASE + 0x200000UL)
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//#define GPSET1 (RPI_GPIO_BASE + 0x20)
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//#define GPCLR1 (RPI_GPIO_BASE + 0x2c)
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#if defined(RPIZERO) || defined(RPIBPLUS) || defined(RPI2) || defined(RPI3)
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#define LED_GPIO_BIT 15
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#define LED_ON() do { RPI_GpioBase->GPCLR0[1] = (1 << LED_GPIO_BIT); } while(0)
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#define LED_OFF() do { RPI_GpioBase->GPSET0[1] = (1 << LED_GPIO_BIT); } while(0)
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#elif defined(RPI3)
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#else
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#define LED_GPIO_BIT 16
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#define LED_ON() do { RPI_GpioBase->GPSET0[1] = (1 << LED_GPIO_BIT); } while(0)
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#define LED_OFF() do { RPI_GpioBase->GPCLR0[0] = (1 << LED_GPIO_BIT); } while(0)
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#endif
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typedef enum
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{
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FS_INPUT = 0,
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FS_OUTPUT,
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FS_ALT5,
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FS_ALT4,
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FS_ALT0,
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FS_ALT1,
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FS_ALT2,
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FS_ALT3,
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} rpi_gpio_alt_function_t;
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/* A mask to be able to clear the bits in the register before setting the value we require */
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#define FS_MASK (7)
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typedef enum
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{
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RPI_GPIO0 = 0,
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RPI_GPIO1,
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RPI_GPIO2,
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RPI_GPIO3,
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RPI_GPIO4,
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RPI_GPIO5,
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RPI_GPIO6,
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RPI_GPIO7,
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RPI_GPIO8,
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RPI_GPIO9,
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RPI_GPIO10 = 10,
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RPI_GPIO11,
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RPI_GPIO12,
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RPI_GPIO13,
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RPI_GPIO14,
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RPI_GPIO15,
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RPI_GPIO16,
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RPI_GPIO17,
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RPI_GPIO18,
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RPI_GPIO19,
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RPI_GPIO20 = 20,
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RPI_GPIO21,
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RPI_GPIO22,
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RPI_GPIO23,
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RPI_GPIO24,
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RPI_GPIO25,
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RPI_GPIO26,
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RPI_GPIO27,
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RPI_GPIO28,
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RPI_GPIO29,
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RPI_GPIO30 = 30,
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RPI_GPIO31,
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RPI_GPIO32,
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RPI_GPIO33,
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RPI_GPIO34,
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RPI_GPIO35,
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RPI_GPIO36,
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RPI_GPIO37,
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RPI_GPIO38,
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RPI_GPIO39,
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RPI_GPIO40 = 40,
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RPI_GPIO41,
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RPI_GPIO42,
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RPI_GPIO43,
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RPI_GPIO44,
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RPI_GPIO45,
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RPI_GPIO46,
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RPI_GPIO47,
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RPI_GPIO48,
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RPI_GPIO49,
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RPI_GPIO50 = 50,
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RPI_GPIO51,
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RPI_GPIO52,
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RPI_GPIO53,
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} rpi_gpio_pin_t;
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/** The GPIO Peripheral is described in section 6 of the BCM2835 Peripherals
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documentation.
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There are 54 general-purpose I/O (GPIO) lines split into two banks. All
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GPIO pins have at least two alternative functions within BCM. The
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alternate functions are usually peripheral IO and a single peripheral
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may appear in each bank to allow flexibility on the choice of IO voltage.
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Details of alternative functions are given in section 6.2. Alternative
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Function Assignments.
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The GPIO peripheral has three dedicated interrupt lines. These lines are
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triggered by the setting of bits in the event detect status register. Each
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bank has its’ own interrupt line with the third line shared between all
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bits.
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The Alternate function table also has the pull state (pull-up/pull-down)
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which is applied after a power down. */
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typedef struct
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{
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rpi_reg_rw_t GPFSEL[6];
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rpi_reg_ro_t Reserved0;
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rpi_reg_wo_t GPSET0[2];
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//rpi_reg_wo_t GPSET1;
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rpi_reg_ro_t Reserved1;
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rpi_reg_wo_t GPCLR0[2];
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//rpi_reg_wo_t GPCLR1;
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rpi_reg_ro_t Reserved2;
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rpi_reg_wo_t GPLEV0[2];
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//rpi_reg_wo_t GPLEV1;
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rpi_reg_ro_t Reserved3;
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rpi_reg_wo_t GPEDS0[2];
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//rpi_reg_wo_t GPEDS1;
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rpi_reg_ro_t Reserved4;
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rpi_reg_wo_t GPREN0[2];
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//rpi_reg_wo_t GPREN1;
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rpi_reg_ro_t Reserved5;
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rpi_reg_wo_t GPFEN0[2];
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//rpi_reg_wo_t GPFEN1;
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rpi_reg_ro_t Reserved6;
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rpi_reg_wo_t GPHEN0[2];
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//rpi_reg_wo_t GPHEN1;
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rpi_reg_ro_t Reserved7;
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rpi_reg_wo_t GPLEN0[2];
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//rpi_reg_wo_t GPLEN1;
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rpi_reg_ro_t Reserved8;
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rpi_reg_wo_t GPAREN0[2];
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//rpi_reg_wo_t GPAREN1;
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rpi_reg_ro_t Reserved9;
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rpi_reg_wo_t GPAFEN0[2];
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//rpi_reg_wo_t GPAFEN1;
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rpi_reg_ro_t Reserved10;
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rpi_reg_wo_t GPPUD;
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rpi_reg_wo_t GPPUDCLK0;
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rpi_reg_wo_t GPPUDCLK1;
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rpi_reg_ro_t Reserved11;
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} rpi_gpio_t;
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typedef enum
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{
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RPI_IO_LO = 0,
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RPI_IO_HI,
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RPI_IO_ON,
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RPI_IO_OFF,
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RPI_IO_UNKNOWN,
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} rpi_gpio_value_t;
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extern rpi_gpio_t* RPI_GpioBase;
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extern void RPI_SetGpioPinFunction(rpi_gpio_pin_t gpio, rpi_gpio_alt_function_t func);
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extern void RPI_SetGpioOutput(rpi_gpio_pin_t gpio);
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extern void RPI_SetGpioInput(rpi_gpio_pin_t gpio);
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extern rpi_gpio_value_t RPI_GetGpioValue(rpi_gpio_pin_t gpio);
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extern void RPI_SetGpioHi(rpi_gpio_pin_t gpio);
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extern void RPI_SetGpioLo(rpi_gpio_pin_t gpio);
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extern void RPI_SetGpioValue(rpi_gpio_pin_t gpio, rpi_gpio_value_t value);
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extern void RPI_ToggleGpio(rpi_gpio_pin_t gpio);
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extern void EnableGpioDetect(rpi_gpio_pin_t gpio, unsigned type);
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extern void DisableGpioDetect(rpi_gpio_pin_t gpio, unsigned type);
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extern void ClearGpioEvent(rpi_gpio_pin_t gpio);
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extern void SetACTLed(int value);
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#if defined(RPI3)
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extern void RPI_TouchInit(void);
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extern void RPI_UpdateTouch(void);
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extern uint32_t RPI_GpioVirtGetAddress(void);
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extern void RPI_GpioVirtInit(void);
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extern void RPI_GpioVirtSetLed(int value);
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#endif
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#endif
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