91 lines
2.8 KiB
C
91 lines
2.8 KiB
C
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//
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// synchronize.h
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//
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// USPi - An USB driver for Raspberry Pi written in C
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// Copyright (C) 2014-2015 R. Stange <rsta2@o2online.de>
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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#ifndef _uspi_synchronize_h
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#define _uspi_synchronize_h
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#include <uspi/macros.h>
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#include <uspi/types.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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//
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// Interrupt synchronization
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//
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void uspi_EnterCritical (void); // disable interrupts (nested calls possible)
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void uspi_LeaveCritical (void); // enable interrupts (nested calls possible)
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#if RASPPI == 1
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//
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// Cache control
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//
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#define InvalidateInstructionCache() \
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__asm volatile ("mcr p15, 0, %0, c7, c5, 0" : : "r" (0) : "memory")
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#define FlushPrefetchBuffer() __asm volatile ("mcr p15, 0, %0, c7, c5, 4" : : "r" (0) : "memory")
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#define FlushBranchTargetCache() \
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__asm volatile ("mcr p15, 0, %0, c7, c5, 6" : : "r" (0) : "memory")
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#define InvalidateDataCache() __asm volatile ("mcr p15, 0, %0, c7, c6, 0" : : "r" (0) : "memory")
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#define CleanDataCache() __asm volatile ("mcr p15, 0, %0, c7, c10, 0" : : "r" (0) : "memory")
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void uspi_CleanAndInvalidateDataCacheRange (u32 nAddress, u32 nLength) MAXOPT;
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//
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// Barriers
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//
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#define DataSyncBarrier() __asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0) : "memory")
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#define DataMemBarrier() __asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0) : "memory")
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#define InstructionSyncBarrier() FlushPrefetchBuffer()
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#define InstructionMemBarrier() FlushPrefetchBuffer()
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#else
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//
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// Cache control
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//
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#define InvalidateInstructionCache() \
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__asm volatile ("mcr p15, 0, %0, c7, c5, 0" : : "r" (0) : "memory")
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#define FlushPrefetchBuffer() __asm volatile ("isb" ::: "memory")
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#define FlushBranchTargetCache() \
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__asm volatile ("mcr p15, 0, %0, c7, c5, 6" : : "r" (0) : "memory")
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void uspi_CleanAndInvalidateDataCacheRange (u32 nAddress, u32 nLength) MAXOPT;
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//
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// Barriers
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//
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#define DataSyncBarrier() __asm volatile ("dsb" ::: "memory")
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#define DataMemBarrier() __asm volatile ("dmb" ::: "memory")
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#define InstructionSyncBarrier() __asm volatile ("isb" ::: "memory")
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#define InstructionMemBarrier() __asm volatile ("isb" ::: "memory")
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#endif
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#define CompilerBarrier() __asm volatile ("" ::: "memory")
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#ifdef __cplusplus
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}
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#endif
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#endif
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