diff --git a/.travis.yml b/.travis.yml
index 8925d95..4d5b01d 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -11,8 +11,9 @@ addons:
 matrix:
   include:
     - env: RASPPI=0
-    - env: RASPPI=1
-    - env: RASPPI=1Plus
+    - env: RASPPI=1BRev1
+    - env: RASPPI=1BRev2
+    - env: RASPPI=1BPlus
     - env: RASPPI=2 
     - env: RASPPI=3
 
diff --git a/Makefile.rules b/Makefile.rules
index 38dd4c3..3f7e2ce 100644
--- a/Makefile.rules
+++ b/Makefile.rules
@@ -3,10 +3,11 @@ ifneq ($(V),1)
 Q		:= @
 endif
 
-#use RASPPI = 1 Raspberry 1B (26 IOports)
-#use RASPPI = 1Plus to Raspberry 1B+ (40 I/OPorts)
+#use RASPPI = 1BRev1 for Raspberry Pi 1B Rev 1 (26 IOports) (GPIO0/1/21)
+#use RASPPI = 1BRev2 for Raspberry Pi 1B Rev 2 (26 IOports) (GPIO2/3/27)
+#use RASPPI = 1BPlus for Raspberry Pi 1B+ (40 I/OPorts)
 
-RASPPI	?= 3
+RASPPI	?= 1BPlus
 PREFIX	?= arm-none-eabi-
 
 CC	= $(PREFIX)gcc
@@ -16,22 +17,25 @@ LD	= $(PREFIX)ld
 AR	= $(PREFIX)ar
 
 ifeq ($(strip $(RASPPI)),0)
-ARCH	?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPIZERO=1 -DEXPERIMENTALZERO=1
-CFLAGS	+= -DRPIZERO=1 -DRASPPI=1
-else ifeq ($(strip $(RASPPI)),1)
-ARCH	?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DEXPERIMENTALZERO=1
-CFLAGS	+= -DRASPPI=1
-else ifeq ($(strip $(RASPPI)),1Plus)
-ARCH	?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPIBPLUS=1 -DEXPERIMENTALZERO=1
-CFLAGS	+= -DRPIBPLUS=1 -DRASPPI=1
+	ARCH	?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPIZERO=1 -DEXPERIMENTALZERO=1
+	CFLAGS	+= -DRPIZERO=1 -DRASPPI=1
+else ifeq ($(strip $(RASPPI)),1BRev1)
+	ARCH	?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPI1BREV1=1 -DEXPERIMENTALZERO=1
+	CFLAGS	+= -DRPI1BREV1=1 -DRASPPI=1
+else ifeq ($(strip $(RASPPI)),1BRev2)
+	ARCH	?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPI1BREV2=1 -DEXPERIMENTALZERO=1
+	CFLAGS	+= -DRPI1BREV2=1 -DRASPPI=1
+else ifeq ($(strip $(RASPPI)),1BPlus)
+	ARCH	?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPI1BPLUS=1 -DEXPERIMENTALZERO=1
+	CFLAGS	+= -DRPI1BPLUS=1 -DRASPPI=1
 else ifeq ($(strip $(RASPPI)),2)
-ARCH	?= -march=armv7-a -mtune=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm -DRPI2=1 -DEXPERIMENTALZERO=1
-CFLAGS	+= -DRPI2=1
+	ARCH	?= -march=armv7-a -mtune=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm -DRPI2=1 -DEXPERIMENTALZERO=1
+	CFLAGS	+= -DRPI2=1
 else ifeq ($(strip $(RASPPI)),3)
-ARCH	?= -march=armv8-a+crc -mtune=cortex-a53 -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -marm -DRPI3=1
-CFLAGS	+= -DRPI3=1
+	ARCH	?= -march=armv8-a+crc -mtune=cortex-a53 -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -marm -DRPI3=1
+	CFLAGS	+= -DRPI3=1
 else
-$(error RASPPI must be one of: 0, 1, 1Plus, 2, 3)
+	$(error RASPPI must be one of: 0, 1BRev1, 1BRev2, 1BPlus, 2, 3)
 endif
 
 AFLAGS	 += $(ARCH)
diff --git a/src/defs.h b/src/defs.h
index f21a6fa..c9130d7 100644
--- a/src/defs.h
+++ b/src/defs.h
@@ -5,7 +5,7 @@
 #define PI1581SUPPORT 1
 // Indicates a Pi with the 40 pin GPIO connector
 // so that additional functionality (e.g. test pins) can be enabled
-#if defined(RPIZERO) || defined(RPIBPLUS) || defined(RPI2) || defined(RPI3)
+#if defined(RPIZERO) || defined(RPI1BPLUS) || defined(RPI2) || defined(RPI3)
 #define HAS_40PINS
 #endif
 
diff --git a/src/iec_bus.h b/src/iec_bus.h
index 9d7059f..278d649 100644
--- a/src/iec_bus.h
+++ b/src/iec_bus.h
@@ -66,7 +66,7 @@
 //	- VIA's DATA IN will automatically set high and hence the DATA line will be pulled low (activated)
 // If ATN and ATNA are in sync
 //	- the output from the XOR gate will be low and the output of its inverter will go high
-//		- when this occurs the DATA line must be still able to be pulled low via the PC or VIA's inverted PB1 (DATA OUT)
+//	- when this occurs the DATA line must be still able to be pulled low via the PC or VIA's inverted PB1 (DATA OUT)
 //
 // Therefore in the same vein if PB7 is set to output it could cause the input of the XOR to be pulled low
 //
@@ -80,8 +80,8 @@ enum PIGPIO
 {
 	// Original Non-split lines
 	PIGPIO_ATN = 2,			// 3
-	PIGPIO_DATA = 18,		// 12
 	PIGPIO_CLOCK = 17,		// 11
+	PIGPIO_DATA = 18,		// 12
 	PIGPIO_SRQ = 19,		// 35
 	PIGPIO_RESET = 3,		// 5
 
@@ -118,16 +118,21 @@ enum PIGPIO
 	PIGPIO_IN_BUTTON1 = 27	// 13 Common
 };
 #else
-//Added GPIO bindings for Raspberry 1B (only 26 I/O ports)
+//Added GPIO bindings for Raspberry Pi 1B Rev 1/2 (only 26 I/O ports)
 enum PIGPIO
 {
 	// Original Non-split lines
+	// Raspberry Pi 1B Rev 2 has GPIO0/1 in place of GPIO2/3
+#if defined(RPI1BREV1)	
+	PIGPIO_ATN = 0,			// 3
+	PIGPIO_RESET = 1,		// 5
+#else
 	PIGPIO_ATN = 2,			// 3
-	PIGPIO_DATA = 18,		// 12
-	PIGPIO_CLOCK = 17,		// 11
-	PIGPIO_SRQ = 19,		// 35  not connected yet
 	PIGPIO_RESET = 3,		// 5
-
+#endif
+	PIGPIO_CLOCK = 17,		// 11
+	PIGPIO_DATA = 18,		// 12
+	PIGPIO_SRQ = 19,		// 35  not connected yet
 
 	// Pinout for those that want to split the lines (and the common ones like buttons, sound and LED)
 	// Funktion = 	GPIO	// Hardware PIN
@@ -140,12 +145,12 @@ enum PIGPIO
 	//PIGPIO_OUT_RESET = 6,	// 31
 	PIGPIO_OUT_SPI0_RS = 6,	// 31 not connected yet
 	// 7 SPI0_CS1			// 26
-	PIGPIO_IN_BUTTON5 =  8,	// 24 changed for Raspberry 1 A.Buch 02.Jan.2020
-	PIGPIO_IN_RESET = 9,	// 21 changed for Raspberry 1 A.Buch 02.Jan.2020
-	PIGPIO_IN_CLOCK = 10,	// 19 changed for Raspberry 1 A.Buch 02.Jan.2020
-	PIGPIO_OUT_LED = 11,	// 23 changed for Raspberry 1 A.Buch 02.Jan.2020
+	PIGPIO_IN_BUTTON5 =  9,	// 21
+	PIGPIO_IN_RESET = 20,	// 38
+	PIGPIO_IN_CLOCK = 10,	// 19
+	PIGPIO_OUT_LED = 7,	    // 26
 	PIGPIO_OUT_ATN = 12,	// 32 not connected yet
-	PIGPIO_OUT_SOUND = 13,  // 33 GPIO 13 is not connected at all with Raspberry 1 Layout
+	PIGPIO_OUT_SOUND = 11,  // 23
 	// 14 TX				// 8
 	// 15 RX  				// 10
 	//GPIO = 16,			// 36 Common
@@ -159,9 +164,11 @@ enum PIGPIO
 	PIGPIO_IN_ATN = 24,		// 18
 	PIGPIO_IN_DATA = 25,	// 22
 	//GPIO 26,				// 37
+#if defined(RPI1BREV1)
+	PIGPIO_IN_BUTTON1 = 21	// 13 Common
+#else
 	PIGPIO_IN_BUTTON1 = 27	// 13 Common
-	//PIGPIO_OUT_SOUND = 45 // ToDo internal GPIO connected with audio out left. To change for sound with Raspberry 1 A.Buch
-							// gives yet an overflow A.Buch 03. Jan. 2020. Sound is still disabled by EXPERIMENTALZERO
+#endif
 };
 #endif
 
@@ -300,11 +307,13 @@ public:
 			// This means that when any pin is turn to output it will output a 0 and pull lines low (ie an activation state on the IEC bus)
 			// Note: on the IEC bus you never output a 1 you simply tri state and it will be pulled up to a 1 (ie inactive state on the IEC bus) if no one else is pulling it low.
 
-			myOutsGPFSEL0 = read32(ARM_GPIO_GPFSEL0);
-			myOutsGPFSEL1 = read32(ARM_GPIO_GPFSEL1);
+			//myOutsGPFSEL0 = read32(ARM_GPIO_GPFSEL0);
+			//myOutsGPFSEL1 = read32(ARM_GPIO_GPFSEL1);
 
-			myOutsGPFSEL1 |= (1 << ((PIGPIO_OUT_LED - 10) * 3));
-			myOutsGPFSEL1 |= (1 << ((PIGPIO_OUT_SOUND - 10) * 3));
+			//myOutsGPFSEL1 |= (1 << ((PIGPIO_OUT_LED - 10) * 3));
+			//myOutsGPFSEL1 |= (1 << ((PIGPIO_OUT_SOUND - 10) * 3));
+			RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_OUT_SOUND, FS_OUTPUT);
+			RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_OUT_LED, FS_OUTPUT);
 		}
 		else
 		{
diff --git a/src/rpi-gpio.h b/src/rpi-gpio.h
index 79f0d67..783fe8b 100644
--- a/src/rpi-gpio.h
+++ b/src/rpi-gpio.h
@@ -37,13 +37,13 @@
 //#define GPSET1		(RPI_GPIO_BASE + 0x20)
 //#define GPCLR1		(RPI_GPIO_BASE + 0x2c)
 
-#if defined(RPIZERO) || defined(RPIBPLUS) || defined(RPI2) || defined(RPI3)
+#if defined(RPIZERO) || defined(RPI1BPLUS) || defined(RPI2) || defined(RPI3)
     #define LED_GPIO_BIT    15
     #define LED_ON()        do { RPI_GpioBase->GPCLR0[1] = (1 << LED_GPIO_BIT); } while(0)
     #define LED_OFF()       do { RPI_GpioBase->GPSET0[1] = (1 << LED_GPIO_BIT); } while(0)
-#elif defined(RPI3)
-// Added LED for Rasberry 1B (26 I/OPorts) according to enum PIGPIO in iec_bus.h A.Buch 02 Jan. 2020
-#elif defined(RASPPI)
+
+// Added LED for Raspberry Pi 1B Rev1/2 (26 I/OPorts) according to enum PIGPIO in iec_bus.h A.Buch 02 Jan. 2020
+#elif defined(RPI1BREV1) || defined (RPI1BREV2)
     #define LED_GPIO_BIT    11
     #define LED_ON()        do { RPI_GpioBase->GPSET0[1] = (1 << LED_GPIO_BIT); } while(0)
     #define LED_OFF()       do { RPI_GpioBase->GPCLR0[0] = (1 << LED_GPIO_BIT); } while(0)
@@ -53,6 +53,7 @@
     #define LED_OFF()       do { RPI_GpioBase->GPCLR0[0] = (1 << LED_GPIO_BIT); } while(0)
 #endif
 
+
 typedef enum
 {
     FS_INPUT = 0,
diff --git a/src/types.h b/src/types.h
index 3c31b96..ccd473c 100644
--- a/src/types.h
+++ b/src/types.h
@@ -10,10 +10,10 @@ typedef unsigned long long	u64;
 typedef signed long long	s64;
 
 typedef enum {
-        LCD_UNKNOWN,
-        LCD_1306_128x64,
-        LCD_1306_128x32,
-        LCD_1106_128x64,
+	LCD_UNKNOWN,
+	LCD_1306_128x64,
+	LCD_1306_128x32,
+	LCD_1106_128x64,
 } LCD_MODEL;
 
 typedef enum {