Made changes to differentiate between Raspberry Pi 1 Mobel B Rev 1 (GPIO 0/1) and Rev 2 (GPIO 2/3) pins
This commit is contained in:
parent
4cf352d70e
commit
3985221eb0
5 changed files with 36 additions and 26 deletions
|
@ -11,8 +11,9 @@ addons:
|
|||
matrix:
|
||||
include:
|
||||
- env: RASPPI=0
|
||||
- env: RASPPI=1
|
||||
- env: RASPPI=1Plus
|
||||
- env: RASPPI=1Br1
|
||||
- env: RASPPI=1Br2
|
||||
- env: RASPPI=1BPlus
|
||||
- env: RASPPI=2
|
||||
- env: RASPPI=3
|
||||
|
||||
|
|
|
@ -3,8 +3,9 @@ ifneq ($(V),1)
|
|||
Q := @
|
||||
endif
|
||||
|
||||
#use RASPPI = 1 Raspberry 1B (26 IOports)
|
||||
#use RASPPI = 1Plus to Raspberry 1B+ (40 I/OPorts)
|
||||
#use RASPPI = 1Br1 Raspberry Pi 1B Rev 1 (26 IOports) (GPIO0/1)
|
||||
#use RASPPI = 1Br2 Raspberry Pi 1B Rev 2 (26 IOports) (GPIO2/3)
|
||||
#use RASPPI = 1BPlus to Raspberry Pi 1B+ (40 I/OPorts)
|
||||
|
||||
RASPPI ?= 3
|
||||
PREFIX ?= arm-none-eabi-
|
||||
|
@ -16,22 +17,25 @@ LD = $(PREFIX)ld
|
|||
AR = $(PREFIX)ar
|
||||
|
||||
ifeq ($(strip $(RASPPI)),0)
|
||||
ARCH ?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPIZERO=1 -DEXPERIMENTALZERO=1
|
||||
CFLAGS += -DRPIZERO=1 -DRASPPI=1
|
||||
else ifeq ($(strip $(RASPPI)),1)
|
||||
ARCH ?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DEXPERIMENTALZERO=1
|
||||
CFLAGS += -DRASPPI=1
|
||||
else ifeq ($(strip $(RASPPI)),1Plus)
|
||||
ARCH ?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPIBPLUS=1 -DEXPERIMENTALZERO=1
|
||||
CFLAGS += -DRPIBPLUS=1 -DRASPPI=1
|
||||
ARCH ?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPIZERO=1 -DEXPERIMENTALZERO=1
|
||||
CFLAGS += -DRPIZERO=1 -DRASPPI=1
|
||||
else ifeq ($(strip $(RASPPI)),1Br1)
|
||||
ARCH ?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPI1BR1 -DEXPERIMENTALZERO=1
|
||||
CFLAGS += -DRPI1BR1 -DRASPPI=1
|
||||
else ifeq ($(strip $(RASPPI)),1Br2)
|
||||
ARCH ?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPI1BR2 -DEXPERIMENTALZERO=1
|
||||
CFLAGS += -DRPI1BR2 -DRASPPI=1
|
||||
else ifeq ($(strip $(RASPPI)),1BPlus)
|
||||
ARCH ?= -march=armv6zk -mtune=arm1176jzf-s -mfpu=vfp -mfloat-abi=hard -DRPIBPLUS=1 -DEXPERIMENTALZERO=1
|
||||
CFLAGS += -DRPIBPLUS=1 -DRASPPI=1
|
||||
else ifeq ($(strip $(RASPPI)),2)
|
||||
ARCH ?= -march=armv7-a -mtune=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm -DRPI2=1 -DEXPERIMENTALZERO=1
|
||||
CFLAGS += -DRPI2=1
|
||||
ARCH ?= -march=armv7-a -mtune=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm -DRPI2=1 -DEXPERIMENTALZERO=1
|
||||
CFLAGS += -DRPI2=1
|
||||
else ifeq ($(strip $(RASPPI)),3)
|
||||
ARCH ?= -march=armv8-a+crc -mtune=cortex-a53 -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -marm -DRPI3=1
|
||||
CFLAGS += -DRPI3=1
|
||||
ARCH ?= -march=armv8-a+crc -mtune=cortex-a53 -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -marm -DRPI3=1
|
||||
CFLAGS += -DRPI3=1
|
||||
else
|
||||
$(error RASPPI must be one of: 0, 1, 1Plus, 2, 3)
|
||||
$(error RASPPI must be one of: 0, 1Br1, 1Br2, 1BPlus, 2, 3)
|
||||
endif
|
||||
|
||||
AFLAGS += $(ARCH)
|
||||
|
|
|
@ -66,7 +66,7 @@
|
|||
// - VIA's DATA IN will automatically set high and hence the DATA line will be pulled low (activated)
|
||||
// If ATN and ATNA are in sync
|
||||
// - the output from the XOR gate will be low and the output of its inverter will go high
|
||||
// - when this occurs the DATA line must be still able to be pulled low via the PC or VIA's inverted PB1 (DATA OUT)
|
||||
// - when this occurs the DATA line must be still able to be pulled low via the PC or VIA's inverted PB1 (DATA OUT)
|
||||
//
|
||||
// Therefore in the same vein if PB7 is set to output it could cause the input of the XOR to be pulled low
|
||||
//
|
||||
|
@ -118,16 +118,21 @@ enum PIGPIO
|
|||
PIGPIO_IN_BUTTON1 = 27 // 13 Common
|
||||
};
|
||||
#else
|
||||
//Added GPIO bindings for Raspberry 1B (only 26 I/O ports)
|
||||
//Added GPIO bindings for Raspberry Pi 1B Rev 1/2 (only 26 I/O ports)
|
||||
enum PIGPIO
|
||||
{
|
||||
// Original Non-split lines
|
||||
// Raspberry Pi 1B Rev 2 has GPIO0/1 in place of GPIO2/3
|
||||
#if defined(RPI1BR1)
|
||||
PIGPIO_ATN = 0, // 3
|
||||
PIGPIO_RESET = 1, // 5
|
||||
#else
|
||||
PIGPIO_ATN = 2, // 3
|
||||
PIGPIO_RESET = 3, // 5
|
||||
#endif
|
||||
PIGPIO_DATA = 18, // 12
|
||||
PIGPIO_CLOCK = 17, // 11
|
||||
PIGPIO_SRQ = 19, // 35 not connected yet
|
||||
PIGPIO_RESET = 3, // 5
|
||||
|
||||
|
||||
// Pinout for those that want to split the lines (and the common ones like buttons, sound and LED)
|
||||
// Funktion = GPIO // Hardware PIN
|
||||
|
|
|
@ -37,7 +37,7 @@
|
|||
//#define GPSET1 (RPI_GPIO_BASE + 0x20)
|
||||
//#define GPCLR1 (RPI_GPIO_BASE + 0x2c)
|
||||
|
||||
#if defined(RPIZERO) || defined(RPIBPLUS) || defined(RPI2) || defined(RPI3)
|
||||
#if defined(RPIZERO) || defined(RPI1BPLUS) || defined(RPI2) || defined(RPI3)
|
||||
#define LED_GPIO_BIT 15
|
||||
#define LED_ON() do { RPI_GpioBase->GPCLR0[1] = (1 << LED_GPIO_BIT); } while(0)
|
||||
#define LED_OFF() do { RPI_GpioBase->GPSET0[1] = (1 << LED_GPIO_BIT); } while(0)
|
||||
|
|
|
@ -10,10 +10,10 @@ typedef unsigned long long u64;
|
|||
typedef signed long long s64;
|
||||
|
||||
typedef enum {
|
||||
LCD_UNKNOWN,
|
||||
LCD_1306_128x64,
|
||||
LCD_1306_128x32,
|
||||
LCD_1106_128x64,
|
||||
LCD_UNKNOWN,
|
||||
LCD_1306_128x64,
|
||||
LCD_1306_128x32,
|
||||
LCD_1106_128x64,
|
||||
} LCD_MODEL;
|
||||
|
||||
typedef enum {
|
||||
|
|
Loading…
Reference in a new issue