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Optimized the DriveLoopWrite code.
This commit is contained in:
Alexander Martinelle 2019-09-01 17:38:27 +02:00
parent 1880a2c710
commit bddc9a7d29
1 changed files with 13 additions and 4 deletions
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17
src/Drive.cpp
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@ -651,11 +651,12 @@ void Drive::DriveLoopRead()
void Drive::DriveLoopWrite() void Drive::DriveLoopWrite()
{ {
unsigned int minCycles; const unsigned int cycleStep = 16 - CLOCK_SEL_AB;
unsigned int cycles = 0; unsigned int cycles = 16 - UE7Counter;
for (unsigned int cycles = 0; cycles != 16; ++cycles) while(cycles < 16)
{ {
if (++UE7Counter == 0x10) // The count carry (bit 4) clocks UF4. //No check is required. This loops is all about the UE7Counter.
//if (UE7Counter == 0x10) // The count carry (bit 4) clocks UF4.
{ {
UE7Counter = CLOCK_SEL_AB; // A and B inputs of UE7 come from the VIA's CLOCK SEL A/B outputs (ie PB5/6) ie preload the encoder/decoder clock for the current density settings. UE7Counter = CLOCK_SEL_AB; // A and B inputs of UE7 come from the VIA's CLOCK SEL A/B outputs (ie PB5/6) ie preload the encoder/decoder clock for the current density settings.
// The decoder consists of UF4 and UE5A. The ecoder has two outputs, Pin 1 of UE5A is the serial data output and pin 2 of UF4 (output B) is the serial clock output. // The decoder consists of UF4 and UE5A. The ecoder has two outputs, Pin 1 of UE5A is the serial data output and pin 2 of UF4 (output B) is the serial clock output.
@ -680,7 +681,15 @@ void Drive::DriveLoopWrite()
SO = (m_pVIA->GetFCR() & m6522::FCR_CA2_OUTPUT_MODE0) != 0; // bit 2 of the FCR indicates "Byte Ready Active" turned on or not. SO = (m_pVIA->GetFCR() & m6522::FCR_CA2_OUTPUT_MODE0) != 0; // bit 2 of the FCR indicates "Byte Ready Active" turned on or not.
writeShiftRegister = m_pVIA->GetPortA()->GetOutput(); writeShiftRegister = m_pVIA->GetPortA()->GetOutput();
} }
if ((16-cycles) < cycleStep)
{
UE7Counter += 16 - cycles;
return;
}
} }
UE7Counter += cycleStep;
cycles += cycleStep;
} }
} }
#endif #endif