SRQ needed to be inverted.

This commit is contained in:
Stephen White 2018-11-04 17:52:00 +11:00
parent a26a4275b2
commit d9528f0f26
2 changed files with 2 additions and 2 deletions

View File

@ -269,7 +269,7 @@ void IEC_Bus::ReadEmulationMode1581(void)
}
else
{
PI_SRQ = false;
PI_SRQ = true;
}
Resetting = !ignoreReset && ((gplev0 & PIGPIO_MASK_IN_RESET) == (invertIECInputs ? PIGPIO_MASK_IN_RESET : 0));

View File

@ -488,7 +488,7 @@ public:
if (ClockSetToOut) set |= 1 << PIGPIO_OUT_CLOCK;
else clear |= 1 << PIGPIO_OUT_CLOCK;
if (!SRQSetToOut) set |= 1 << PIGPIO_OUT_SRQ; // fast clock is pulled high but we have an inverter in our hardware so to compensate we invert in software now
if (SRQSetToOut) set |= 1 << PIGPIO_OUT_SRQ; // fast clock is pulled high but we have an inverter in our hardware so to compensate we invert in software now
else clear |= 1 << PIGPIO_OUT_SRQ;
if (!invertIECOutputs) {