602 lines
No EOL
19 KiB
C++
602 lines
No EOL
19 KiB
C++
// Pi1541 - A Commodore 1541 disk drive emulator
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// Copyright(C) 2018 Stephen White
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//
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// This file is part of Pi1541.
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//
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// Pi1541 is free software : you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// Pi1541 is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with Pi1541. If not, see <http://www.gnu.org/licenses/>.
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#ifndef IEC_BUS_H
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#define IEC_BUS_H
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#include "debug.h"
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#include "m6522.h"
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#include "rpi-gpio.h"
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#include "rpiHardware.h"
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#define INPUT_BUTTON_DEBOUNCE_THRESHOLD 20000
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#define INPUT_BUTTON_REPEAT_THRESHOLD 460000
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// DIN ATN is inverted and then connected to pb7 and ca1
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// - also input to xor with ATNAout pb4
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// - output of xor is inverted and connected to DIN pin 5 DATAout (OC so can only pull low)
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// VIA ATNin pb7 input to xor
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// VIA ATNin ca1 output from inverted DIN 3 ATN
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// DIN DATA is inverted and then connected to pb1
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// VIA DATAin pb0 output from inverted DIN 5 DATA
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// VIA DATAout pb1 inverted and then connected to DIN DATA
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// DIN CLK is inverted and then connected to pb2
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// VIA CLKin pb2 output from inverted DIN 4 CLK
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// VIA CLKout pb3 inverted and then connected to DIN CLK
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// $1800
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// PB 0 data in
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// PB 1 data out
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// PB 2 clock in
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// PB 3 clock out
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// PB 4 ATNA
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// PB 5,6 device address
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// PB 7,CA1 ATN IN
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// If ATN and ATNA are out of sync
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// - VIA's DATA IN will automatically set high and hence the DATA line will be pulled low (activated)
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// If ATN and ATNA are in sync
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// - the output from the XOR gate will be low and the output of its inverter will go high
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// - when this occurs the DATA line must be still able to be pulled low via the PC or VIA's inverted PB1 (DATA OUT)
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//
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// Therefore in the same vein if PB7 is set to output it could cause the input of the XOR to be pulled low
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//
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enum PIGPIO
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{
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// Original Non-split lines
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PIGPIO_ATN = 2, // 3
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PIGPIO_DATA = 18, // 12
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PIGPIO_CLOCK = 17, // 11
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PIGPIO_SRQ = 19, // 35
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PIGPIO_RESET = 3, // 5
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// Pinout for those that want to split the lines (and the common ones like buttons, sound and LED)
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// 0 IDSC //28
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// 1 IDSD //27
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// 2 I2C_SDA //3
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// 3 I2C_CLK //5
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PIGPIO_IN_BUTTON4 = 4, // 07 Common
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PIGPIO_IN_BUTTON5 = 5, // 29 Common
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PIGPIO_OUT_RESET = 6, // 31
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// 7 SPI0_CS1 //26
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// 8 SPI0_CS0 //24
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// 9 SPI0_MISO //21
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// 10 SPI0_MOSI //19
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// 11 SPI0_CLK //23
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PIGPIO_OUT_ATN = 12, // 32
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PIGPIO_OUT_SOUND = 13, // 33 Common
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// 14 TX //8
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// 15 RX //10
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PIGPIO_OUT_LED = 16, // 36 Common
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PIGPIO_OUT_CLOCK = 17, // 11
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PIGPIO_OUT_DATA = 18, // 12
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PIGPIO_OUT_SRQ = 19, // 35
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PIGPIO_IN_RESET = 20, // 38
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PIGPIO_IN_SRQ = 21, // 40
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PIGPIO_IN_BUTTON2 = 22, // 15 Common
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PIGPIO_IN_BUTTON3 = 23, // 16 Common
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PIGPIO_IN_ATN = 24, // 18
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PIGPIO_IN_DATA = 25, // 22
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PIGPIO_IN_CLOCK = 26, // 37
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PIGPIO_IN_BUTTON1 = 27 // 13 Common
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};
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enum PIGPIOMasks
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{
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// Non-split lines
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//PIGPIO_MASK_IN_ATN = 1 << PIGPIO_ATN,
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//PIGPIO_MASK_IN_DATA = 1 << PIGPIO_DATA,
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//PIGPIO_MASK_IN_CLOCK = 1 << PIGPIO_CLOCK,
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//PIGPIO_MASK_IN_SRQ = 1 << PIGPIO_SRQ,
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//PIGPIO_MASK_IN_RESET = 1 << PIGPIO_RESET,
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// Split lines
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//PIGPIO_MASK_IN_ATN = 1 << PIGPIO_IN_ATN,
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//PIGPIO_MASK_IN_DATA = 1 << PIGPIO_IN_DATA,
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//PIGPIO_MASK_IN_CLOCK = 1 << PIGPIO_IN_CLOCK,
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//PIGPIO_MASK_IN_SRQ = 1 << PIGPIO_IN_SRQ,
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//PIGPIO_MASK_IN_RESET = 1 << PIGPIO_IN_RESET,
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PIGPIO_MASK_IN_BUTTON1 = 1 << PIGPIO_IN_BUTTON1,
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PIGPIO_MASK_IN_BUTTON2 = 1 << PIGPIO_IN_BUTTON2,
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PIGPIO_MASK_IN_BUTTON3 = 1 << PIGPIO_IN_BUTTON3,
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PIGPIO_MASK_IN_BUTTON4 = 1 << PIGPIO_IN_BUTTON4,
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PIGPIO_MASK_IN_BUTTON5 = 1 << PIGPIO_IN_BUTTON5,
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};
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static const unsigned ButtonPinFlags[5] = { PIGPIO_MASK_IN_BUTTON1, PIGPIO_MASK_IN_BUTTON2, PIGPIO_MASK_IN_BUTTON3, PIGPIO_MASK_IN_BUTTON4, PIGPIO_MASK_IN_BUTTON5 };
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///////////////////////////////////////////////////////////////////////////////////////////////
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// Original Non-split lines
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///////////////////////////////////////////////////////////////////////////////////////////////
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// I kind of stuffed up selecting what pins should be what.
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// Originally I wanted the hardware interface to be as simple as possible and was focused on all the connections down one end of the Pi header.
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// Also, originally I was only worried about ATN, DATA, CLOCK and RESET. Buttons were optional. With DATA and CLOCK only needing to go output.
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// With hindsight (now wanting to support NIBTools ATN should have been put in the same pin group as DATA and CLOCK);
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// This now requires 2 GPIO writes as PIN2 is in SEL0 and pins 17 and 18 are in SEL1.
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//GPFSEL0
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// 9 8 7 6 5 4 3 2 1 0
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// 000 000 000 000 000 000 000 001 000 000
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// To support NIBTools ATN can be made an output as well
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static const u32 PI_OUTPUT_MASK_GPFSEL0 = ~((1 << (PIGPIO_ATN * 3)));
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//GPFSEL1 RX TX
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// 19 18 17 16 15 14 13 12 11 10
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// 000 001 001 000 000 000 000 000 000 000 (bits 21 and 24 for GPIO 17 and 18 as outputs)
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//static const u32 PI_OUTPUT_MASK_GPFSEL1 = ~((1 << 21) | (1 << 24));
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// 000 001 001 001 000 000 001 000 000 000 (bits 21 and 24 for GPIO 17 and 18 as outputs)
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//static const u32 PI_OUTPUT_MASK_GPFSEL1 = ~((1 << ((PIGPIO_OUT_SOUND - 10) * 3)) | (1 << ((PIGPIO_OUT_LED - 10) * 3)) | (1 << ((PIGPIO_CLOCK - 10) * 3)) | (1 << ((PIGPIO_DATA - 10) * 3)));
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static const u32 PI_OUTPUT_MASK_GPFSEL1 = ~((1 << ((PIGPIO_CLOCK - 10) * 3)) | (1 << ((PIGPIO_DATA - 10) * 3)));
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///////////////////////////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////////////////////////
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// Pinout for those that want to split the lines (and the common ones like buttons, sound and LED)
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///////////////////////////////////////////////////////////////////////////////////////////////
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// OUT (need 7)
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// CLK
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// DATA
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// SRQ
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// ATN
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// RST
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// LED
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// SND
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// IN (need 10)
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// CLK
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// DATA
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// ATN
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// RST
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// SRQ
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// BTN1
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// BTN2
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// BTN3
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// BTN4
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// BTN5
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//GPFSEL0
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// S S S
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// P P P I I
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// I I I 2 2
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// 0 0 0 C C
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// M C C S S I I
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// I E E C D D D
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// S 0 1 W R R L A S S
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// O RST B5 B4 1 1 D C
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// 9 8 7 6 5 4 3 2 1 0
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//GPFSEL1
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// RX TX S S
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// RX TX P P
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// RX TX I I
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// RX TX 0 0
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// RX TX M
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// RX TX C O
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// W W W W RX TX W W L S
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// SRQ DTA CLK LED RX TX SND ATN K I
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// 19 18 17 16 15 14 13 12 11 10
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//GPFSEL2
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// X X
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// X X
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// X X
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// X X
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// X X
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// X X
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// X X R R R R R R R R
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// X X B1 CLK DTA ATN B3 B2 SRQ RST
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// 29 28 27 26 25 24 23 22 21 20
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// 000 000 000 000 000 000 000 000 000 000
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///////////////////////////////////////////////////////////////////////////////////////////////
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enum VIAPortPins
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{
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VIAPORTPINS_DATAIN = 0x01, //pb0
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VIAPORTPINS_DATAOUT = 0x02, //pb1
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VIAPORTPINS_CLOCKIN = 0x04, //pb2
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VIAPORTPINS_CLOCKOUT = 0x08,//pb3
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VIAPORTPINS_ATNAOUT = 0x10, //pb4
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VIAPORTPINS_DEVSEL0 = 0x20, //pb5
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VIAPORTPINS_DEVSEL1 = 0x40, //pb5
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VIAPORTPINS_ATNIN = 0x80 //bp7
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};
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typedef bool(*CheckStatus)();
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class IEC_Bus
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{
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public:
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static inline void Initialise(void)
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{
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volatile int index; // Force a real delay in the loop below.
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// Clear all outputs to 0
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write32(ARM_GPIO_GPCLR0, 0xFFFFFFFF);
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if (!splitIECLines)
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{
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// This means that when any pin is turn to output it will output a 0 and pull lines low (ie an activation state on the IEC bus)
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// Note: on the IEC bus you never output a 1 you simply tri state and it will be pulled up to a 1 (ie inactive state on the IEC bus) if no one else is pulling it low.
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myOutsGPFSEL0 = read32(ARM_GPIO_GPFSEL0);
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myOutsGPFSEL1 = read32(ARM_GPIO_GPFSEL1);
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myOutsGPFSEL1 |= (1 << ((PIGPIO_OUT_LED - 10) * 3));
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myOutsGPFSEL1 |= (1 << ((PIGPIO_OUT_SOUND - 10) * 3));
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}
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else
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{
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_IN_BUTTON4, FS_INPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_IN_BUTTON5, FS_INPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_IN_RESET, FS_INPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_IN_SRQ, FS_INPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_IN_BUTTON2, FS_INPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_IN_BUTTON3, FS_INPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_IN_ATN, FS_INPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_IN_DATA, FS_INPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_IN_CLOCK, FS_INPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_IN_BUTTON1, FS_INPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_OUT_RESET, FS_OUTPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_OUT_ATN, FS_OUTPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_OUT_SOUND, FS_OUTPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_OUT_LED, FS_OUTPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_OUT_CLOCK, FS_OUTPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_OUT_DATA, FS_OUTPUT);
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RPI_SetGpioPinFunction((rpi_gpio_pin_t)PIGPIO_OUT_SRQ, FS_OUTPUT);
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}
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// Set up audio.
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write32(CM_PWMDIV, CM_PASSWORD + 0x2000);
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write32(CM_PWMCTL, CM_PASSWORD + CM_ENAB + CM_SRC_OSCILLATOR); // Use Default 100MHz Clock
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// Set PWM
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write32(PWM_RNG1, 0x1B4); // 8bit 44100Hz Mono
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write32(PWM_RNG2, 0x1B4);
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write32(PWM_CTL, PWM_USEF2 + PWM_PWEN2 + PWM_USEF1 + PWM_PWEN1 + PWM_CLRF1);
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int buttonCount = sizeof(ButtonPinFlags) / sizeof(unsigned);
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for (index = 0; index < buttonCount; ++index)
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{
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InputButton[index] = false;
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InputButtonPrev[index] = false;
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validInputCount[index] = 0;
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inputRepeatThreshold[index] = INPUT_BUTTON_REPEAT_THRESHOLD;
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inputRepeat[index] = 0;
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inputRepeatPrev[index] = 0;
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}
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// Enable the internal pullups for the input button pins using the method described in BCM2835-ARM-Peripherals manual.
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RPI_GpioBase->GPPUD = 2;
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for (index = 0; index < 150; ++index)
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{
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}
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RPI_GpioBase->GPPUDCLK0 = PIGPIO_MASK_IN_BUTTON1 | PIGPIO_MASK_IN_BUTTON2 | PIGPIO_MASK_IN_BUTTON3 | PIGPIO_MASK_IN_BUTTON4 | PIGPIO_MASK_IN_BUTTON5;
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for (index = 0; index < 150; ++index)
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{
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}
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RPI_GpioBase->GPPUD = 0;
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RPI_GpioBase->GPPUDCLK0 = 0;
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}
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static inline void UpdateButton(int index, unsigned gplev0)
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{
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bool inputcurrent = (gplev0 & ButtonPinFlags[index]) == 0;
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InputButtonPrev[index] = InputButton[index];
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inputRepeatPrev[index] = inputRepeat[index];
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if (inputcurrent)
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{
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validInputCount[index]++;
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if (validInputCount[index] == INPUT_BUTTON_DEBOUNCE_THRESHOLD)
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{
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InputButton[index] = true;
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inputRepeatThreshold[index] = INPUT_BUTTON_DEBOUNCE_THRESHOLD + INPUT_BUTTON_REPEAT_THRESHOLD;
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inputRepeat[index]++;
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}
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if (validInputCount[index] == inputRepeatThreshold[index])
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{
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inputRepeat[index]++;
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inputRepeatThreshold[index] += INPUT_BUTTON_REPEAT_THRESHOLD / inputRepeat[index];
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}
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}
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else
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{
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InputButton[index] = false;
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validInputCount[index] = 0;
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inputRepeatThreshold[index] = INPUT_BUTTON_REPEAT_THRESHOLD;
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inputRepeat[index] = 0;
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inputRepeatPrev[index] = 0;
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}
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}
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static void Read(void);
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static void WaitUntilReset(void)
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{
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unsigned gplev0;
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do
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{
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gplev0 = read32(ARM_GPIO_GPLEV0);
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Resetting = (gplev0 & PIGPIO_MASK_IN_RESET) == (invertIECInputs ? PIGPIO_MASK_IN_RESET : 0);
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if (Resetting)
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IEC_Bus::WaitMicroSeconds(100);
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}
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while (Resetting);
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}
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// Out going
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static void PortB_OnPortOut(void* pUserData, unsigned char status)
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{
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bool oldDataSetToOut = DataSetToOut;
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bool oldClockSetToOut = ClockSetToOut;
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// These are the values the VIA is trying to set the outputs to
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VIA_Atna = (status & (unsigned char)VIAPORTPINS_ATNAOUT) != 0;
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VIA_Data = (status & (unsigned char)VIAPORTPINS_DATAOUT) != 0; // VIA DATAout PB1 inverted and then connected to DIN DATA
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VIA_Clock = (status & (unsigned char)VIAPORTPINS_CLOCKOUT) != 0; // VIA CLKout PB3 inverted and then connected to DIN CLK
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// Emulate the XOR gate UD3
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AtnaDataSetToOut = (VIA_Atna != PI_Atn);
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if (AtnaDataSetToOut)
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{
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// if the output of the XOR gate is high (ie VIA_Atna != PI_Atn) then this is inverted and pulls DATA low (activating it)
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PI_Data = true;
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if (VIA) VIA->GetPortB()->SetInput(VIAPORTPINS_DATAIN, true); // simulate the read in software
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}
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if (VIA)
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{
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// If the VIA's data and clock outputs ever get set to inputs the real hardware reads these lines as asserted.
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bool PB1SetToInput = (VIA->GetPortB()->GetDirection() & 2) == 0;
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bool PB3SetToInput = (VIA->GetPortB()->GetDirection() & 8) == 0;
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if (PB1SetToInput) VIA_Data = true;
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if (PB3SetToInput) VIA_Clock = true;
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}
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ClockSetToOut = VIA_Clock;
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DataSetToOut = VIA_Data;
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if (!oldDataSetToOut && DataSetToOut)
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{
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PI_Data = true;
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if (VIA) VIA->GetPortB()->SetInput(VIAPORTPINS_DATAOUT, true); // simulate the read in software
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}
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if (!oldClockSetToOut && ClockSetToOut)
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{
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PI_Clock = true;
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if (VIA) VIA->GetPortB()->SetInput(VIAPORTPINS_CLOCKIN, true); // simulate the read in software
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}
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}
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static inline void RefreshOuts(void)
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{
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unsigned set = 0;
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unsigned clear = 0;
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if (!splitIECLines)
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{
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unsigned outputs = 0;
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if (AtnaDataSetToOut || DataSetToOut) outputs |= (FS_OUTPUT << ((PIGPIO_DATA - 10) * 3));
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if (ClockSetToOut) outputs |= (FS_OUTPUT << ((PIGPIO_CLOCK - 10) * 3));
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unsigned nValue = (myOutsGPFSEL1 & PI_OUTPUT_MASK_GPFSEL1) | outputs;
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write32(ARM_GPIO_GPFSEL1, nValue);
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}
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else
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{
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if (AtnaDataSetToOut || DataSetToOut) set |= 1 << PIGPIO_OUT_DATA;
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else clear |= 1 << PIGPIO_OUT_DATA;
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if (ClockSetToOut) set |= 1 << PIGPIO_OUT_CLOCK;
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else clear |= 1 << PIGPIO_OUT_CLOCK;
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}
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if (OutputLED) set |= 1 << PIGPIO_OUT_LED;
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else clear |= 1 << PIGPIO_OUT_LED;
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if (OutputSound) set |= 1 << PIGPIO_OUT_SOUND;
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else clear |= 1 << PIGPIO_OUT_SOUND;
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write32(ARM_GPIO_GPSET0, set);
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write32(ARM_GPIO_GPCLR0, clear);
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}
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static void WaitMicroSeconds(u32 amount)
|
|
{
|
|
u32 count;
|
|
|
|
for (count = 0; count < amount; ++count)
|
|
{
|
|
unsigned before;
|
|
unsigned after;
|
|
// We try to update every micro second and use as a rough timer to count micro seconds
|
|
before = read32(ARM_SYSTIMER_CLO);
|
|
do
|
|
{
|
|
after = read32(ARM_SYSTIMER_CLO);
|
|
} while (after == before);
|
|
}
|
|
}
|
|
|
|
///////////////////////////////////////////////////////////////////////////////////////////////
|
|
// Manual methods used by IEC_Commands
|
|
static inline void AssertData()
|
|
{
|
|
if (!DataSetToOut)
|
|
{
|
|
DataSetToOut = true;
|
|
RefreshOuts();
|
|
}
|
|
}
|
|
static inline void ReleaseData()
|
|
{
|
|
if (DataSetToOut)
|
|
{
|
|
DataSetToOut = false;
|
|
RefreshOuts();
|
|
}
|
|
}
|
|
|
|
static inline void AssertClock()
|
|
{
|
|
if (!ClockSetToOut)
|
|
{
|
|
ClockSetToOut = true;
|
|
RefreshOuts();
|
|
}
|
|
}
|
|
static inline void ReleaseClock()
|
|
{
|
|
if (ClockSetToOut)
|
|
{
|
|
ClockSetToOut = false;
|
|
RefreshOuts();
|
|
}
|
|
}
|
|
static inline bool GetPI_Atn() { return PI_Atn; }
|
|
static inline bool IsAtnAsserted() { return PI_Atn; }
|
|
static inline bool IsAtnReleased() { return !PI_Atn; }
|
|
static inline bool GetPI_Data() { return PI_Data; }
|
|
static inline bool IsDataAsserted() { return PI_Data; }
|
|
static inline bool IsDataReleased() { return !PI_Data; }
|
|
static inline bool GetPI_Clock() { return PI_Clock; }
|
|
static inline bool IsClockAsserted() { return PI_Clock; }
|
|
static inline bool IsClockReleased() { return !PI_Clock; }
|
|
static inline bool GetPI_Reset() { return PI_Reset; }
|
|
static inline bool IsDataSetToOut() { return DataSetToOut; }
|
|
static inline bool IsAtnaDataSetToOut() { return AtnaDataSetToOut; }
|
|
static inline bool IsClockSetToOut() { return ClockSetToOut; }
|
|
static inline bool IsReset() { return Resetting; }
|
|
|
|
static inline void WaitWhileAtnAsserted()
|
|
{
|
|
while (IsAtnAsserted())
|
|
{
|
|
Read();
|
|
}
|
|
}
|
|
///////////////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
static inline void SetSplitIECLines(bool value)
|
|
{
|
|
splitIECLines = value;
|
|
if (splitIECLines)
|
|
{
|
|
PIGPIO_MASK_IN_ATN = 1 << PIGPIO_IN_ATN;
|
|
PIGPIO_MASK_IN_DATA = 1 << PIGPIO_IN_DATA;
|
|
PIGPIO_MASK_IN_CLOCK = 1 << PIGPIO_IN_CLOCK;
|
|
PIGPIO_MASK_IN_SRQ = 1 << PIGPIO_IN_SRQ;
|
|
PIGPIO_MASK_IN_RESET = 1 << PIGPIO_IN_RESET;
|
|
}
|
|
}
|
|
|
|
static inline void SetInvertIECInputs(bool value)
|
|
{
|
|
invertIECInputs = value;
|
|
if (value)
|
|
{
|
|
PI_Atn = ~PI_Atn;
|
|
PI_Data = ~PI_Data;
|
|
PI_Clock = ~PI_Clock;
|
|
PI_Reset = ~PI_Reset;
|
|
}
|
|
}
|
|
|
|
// CA1 input ATN
|
|
// If CA1 is ever set to output
|
|
// - CA1 will start to drive pb7
|
|
// CA2, CB1 and CB2 are not connected
|
|
// - check if pulled high or low
|
|
static m6522* VIA;
|
|
|
|
static inline void Reset(void)
|
|
{
|
|
WaitUntilReset();
|
|
|
|
// VIA $1800
|
|
// CA2, CB1 and CB2 are not connected (reads as high)
|
|
// VIA $1C00
|
|
// CB1 not connected (reads as high)
|
|
|
|
VIA_Atna = false;
|
|
VIA_Data = false;
|
|
VIA_Clock = false;
|
|
|
|
DataSetToOut = false;
|
|
ClockSetToOut = false;
|
|
|
|
PI_Atn = false;
|
|
PI_Data = false;
|
|
PI_Clock = false;
|
|
|
|
AtnaDataSetToOut = (VIA_Atna != PI_Atn);
|
|
if (AtnaDataSetToOut) PI_Data = true;
|
|
|
|
RefreshOuts();
|
|
}
|
|
|
|
static bool GetInputButtonPressed(int buttonIndex) { return InputButton[buttonIndex] && !InputButtonPrev[buttonIndex]; }
|
|
static bool GetInputButtonReleased(int buttonIndex) { return !InputButton[buttonIndex] && InputButtonPrev[buttonIndex]; }
|
|
static bool GetInputButton(int buttonIndex) { return InputButton[buttonIndex]; }
|
|
static bool GetInputButtonRepeating(int buttonIndex) { return inputRepeat[buttonIndex] != inputRepeatPrev[buttonIndex]; }
|
|
|
|
static bool OutputLED;
|
|
static bool OutputSound;
|
|
|
|
private:
|
|
static bool splitIECLines;
|
|
static bool invertIECInputs;
|
|
static u32 PIGPIO_MASK_IN_ATN;
|
|
static u32 PIGPIO_MASK_IN_DATA;
|
|
static u32 PIGPIO_MASK_IN_CLOCK;
|
|
static u32 PIGPIO_MASK_IN_SRQ;
|
|
static u32 PIGPIO_MASK_IN_RESET;
|
|
|
|
static bool PI_Atn;
|
|
static bool PI_Data;
|
|
static bool PI_Clock;
|
|
static bool PI_Reset;
|
|
|
|
static bool VIA_Atna;
|
|
static bool VIA_Data;
|
|
static bool VIA_Clock;
|
|
|
|
static bool DataSetToOut;
|
|
static bool AtnaDataSetToOut;
|
|
static bool ClockSetToOut;
|
|
static bool Resetting;
|
|
|
|
static u32 myOutsGPFSEL0;
|
|
static u32 myOutsGPFSEL1;
|
|
static bool InputButton[5];
|
|
static bool InputButtonPrev[5];
|
|
static u32 validInputCount[5];
|
|
static u32 inputRepeatThreshold[5];
|
|
static u32 inputRepeat[5];
|
|
static u32 inputRepeatPrev[5];
|
|
};
|
|
#endif |